Memory module having a two-transistor memory cell
US6466474B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 30, 2001 |
| Grant date | Oct 15, 2002 |
| Priority date | — |
| Expiry date | Aug 30, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/405
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory module stores digital data. The memory module has many memory cells biased by a voltage source. Each memory cell has an access transistor electrically connected to a word line and a bit line for receiving bits from the bit line when the word line turns on the access transistor, a switching circuit electrically connected to the access transistor, and a capacitor electrically connected to the switching circuit. The switching circuit turns on or off according to the bit from the access transistor. The capacitor stores charge supplied by the switching circuit when the switching circuit turns on. The capacitor stores charge supplied by the voltage source when the switching circuit turns off. When the access transistor turns off, the switching circuit or the voltage source provides charge to the capacitor to sustain the voltage level of the capacitor to compensate for charge leakage of the capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.