Programmable logic device having embedded dual-port random access memory configurable as single-port memory
US6467017B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 29, 1998 |
| Grant date | Oct 15, 2002 |
| Priority date | — |
| Expiry date | Jan 5, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/104
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable logic device has embedded random access memory (“RAM”) that can function equally well in either single-port or dual-port operation. The RAM is dual-port RAM whose read address inputs and write address inputs are both connected to a conductor bus via two different sparsely populated programmable interconnection resources. The programmable interconnection resources are arranged so that each pair of corresponding read address and write address inputs can be connected to at least one conductor in common on the conductor bus, allowing the RAM to be configured to mimic a single-port RAM as read address signals and write address signals originating at remote components of the programmable logic device “think” they are being directed to the same address inputs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.