Method of fabricating semiconductor components
US6468896B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2000 |
| Grant date | Oct 22, 2002 |
| Priority date | — |
| Expiry date | Dec 29, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/95
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a method for producing semiconductor elements including a metal layer (10) configured on a semiconductor substrate (5). The inventive method consists of the following steps: a silicon layer (15) is deposited on a metal layer (10); an etch mask is applied in order to structure the silicon layer (1%); the silicon layer is selectively etched (15) using the etch mask (25); and the metal layer (10) is structured in an etching process using a selectively etched silicon layer (15) as a hard mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.