Patent · US Expired

Method of forming integrated circuitry, method of forming a capacitor and method of forming DRAM integrated circuitry

US6475855B1 · kind B1 · utility

30Cited by
4References
40Claims
0Family size

Assignee

Inventor

Key dates

Filing dateMar 1, 2000
Grant dateNov 5, 2002
Priority date
Expiry dateMar 1, 2020

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10S257/908

Abstract

The invention comprises a method of forming integrated circuitry, a method of forming a capacitor, a methods of forming DRAM integrated circuitry, integrated circuitry and DRAM integrated circuitry. In but one implementation, a method of forming integrated circuitry includes forming a first capacitor electrode layer over a substrate. A capacitor dielectric layer is formed over the first capacitor electrode layer. A second capacitor electrode layer is formed over the capacitor dielectric layer and a capacitor is formed comprising the first capacitor electrode layer, the capacitor dielectric layer and the second capacitor electrode layer. A silicon nitride comprising layer is physical vapor deposited over the second capacitor electrode layer. A final passivation layer is formed over the physical vapor deposited silicon nitride comprising layer. In one implementation, integrated circuitry includes a first capacitor electrode layer received over a substrate. A capacitor dielectric layer is received over the first capacitor electrode layer. A second capacitor electrode layer is received over the capacitor dielectric layer. The first capacitor electrode layer, the capacitor dielectric la…

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.