Method of manufacturing a semiconductor structure with treatment to sacrificial stop layer producing diffusion to an adjacent low-k dielectric layer lowering the constant
US6475929B1 · kind B1 · utility
34Cited by
1References
18Claims
0Family size
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Key dates
| Filing date | Feb 1, 2001 |
| Grant date | Nov 5, 2002 |
| Priority date | — |
| Expiry date | Apr 21, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a low-k semiconductor structure including the steps of forming a low-k dielectric layer, forming a sacrificial etch stop layer adjacent the low-k dielectric layer, and applying energy to the sacrificial etch stop layer to diffuse a component of the sacrificial etch stop layer into the adjacent low-k dielectric layer. This diffusion of the component lowers the dielectric constant of the adjacent low-k dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.