Semiconductor catalytic layer and atomic layer deposition thereof
US6479902B1 · kind B1 · utility
59Cited by
5References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2000 |
| Grant date | Nov 12, 2002 |
| Priority date | — |
| Expiry date | Aug 23, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor and manufacturing method is provided for device interconnects with a catalytic layer of copper, palladium, nickel, cobalt, silver, or other catalytic material deposited in a atomic layer by atomic layer epitaxy on a barrier layer of tantalum, titanium, tungsten, their nitrides, or a compound thereof between the barrier layer and an electroless seed layer on which conductive channel and via material is deposited.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.