Exposure correction based on reflective index for photolithographic process control
US6482573B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 27, 2000 |
| Grant date | Nov 19, 2002 |
| Priority date | — |
| Expiry date | Jan 27, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S430/151
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
Critical dimension variation of photolithographically formed features on a semiconductor substrate is reduced by measuring the reflectivity of a photoresist layer and an underlying layer, such as a polysilicon layer, and adjusting the exposure level of the photoresist in accordance with the measured reflectivity. This allows precise control of feature width on the photoresist, which in turn allows precision etching of the underlying layer to accurately form a feature, such as a gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.