Localized heating for defect isolation during die operation
US6483326B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 10, 1999 |
| Grant date | Nov 19, 2002 |
| Priority date | — |
| Expiry date | Aug 10, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/311
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
According to an example embodiment, a method for testing a semiconductor die is provided. The semiconductor die has circuitry on one side and silicon on an opposite side, and the opposite side may be AR coated. The opposite side is thinned, the die is powered, and a portion of the circuitry is heated to cause a reaction (e.g., a circuit failure or recovery) in a target region. The circuitry is monitored, and the circuit that reacts to the heat is detected and analyzed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.