Current driver configuration for MRAM
US6483768B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 3, 2001 |
| Grant date | Nov 19, 2002 |
| Priority date | — |
| Expiry date | Jul 3, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/1697
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A current driver configuration for MRAMs includes word-line drivers and bit-line drivers at respective first ends of word lines and bit lines. The word line drivers and the bit line drivers each include a series circuit formed by an n-channel field-effect transistor and a current source. Further series circuits are provided at the respective second ends of the word lines and the bit lines. Each of the further series circuits includes a second n-channel field-effect transistor and a voltage source.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.