High quality oxide for use in integrated circuits
US6492712B1 · kind B1 · utility
2Cited by
6References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 20, 2000 |
| Grant date | Dec 10, 2002 |
| Priority date | — |
| Expiry date | Jun 20, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02255
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An oxide for use in integrated circuits is substantially stress-free both in the bulk and at the interface between the substrate and the oxide. The interface is planar and has a low interface trap density (Nit). The oxide has a low defect density and may have a thickness of less than 1.5 nm or less.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.