Method of producing masks for fabricating semiconductor structures
US6493865B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 10, 2001 |
| Grant date | Dec 10, 2002 |
| Priority date | — |
| Expiry date | Apr 10, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F1/70
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
Masks are produced for the fabrication of semiconductor structures based on layout data that has information for defining a mask layout with individual geometric structure elements. Layout data generated previously for a mask layout is checked to see whether geometric design requirements are satisfied. In the event of a violation of design requirements, the corresponding error locations in the mask layout are located. Further layout data are then generated, which contain information for defining correction figures to correct the respective error locations. The further layout data are linked with the layout data, so that the layout data are modified. This permits automated modification of the layout data and their technology-dependent optimization.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.