Method to deposit a seeding layer for electroless copper plating
US6495200B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 7, 1998 |
| Grant date | Dec 17, 2002 |
| Priority date | — |
| Expiry date | Dec 7, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76874
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of for electroless copper deposition using a Pd/Pd acetate seeding layer formed in using only two components (Pd acetate and solvent) to form an interconnect for a semiconductor device. The invention has two preferred embodiments. The first embodiment forms a Key seed layer composed of Pd/Pd acetate by a spin-on or dip process for the electroless plating of a Cu plug. The second embodiment forms a Pd passivation cap layer over the Cu plug to prevent the Cu plug from oxidizing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.