Patent · US Expired

Thinning and dicing of semiconductor wafers using dry etch, and obtaining semiconductor chips with rounded bottom edges and corners

US6498074B2 · kind B2 · utility

53Cited by
76References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 6, 2001
Grant dateDec 24, 2002
Priority date
Expiry dateJun 6, 2021

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10S438/977
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor wafer is diced before thinning. The wafer is diced only part of the way through, to form grooves which are at least as deep as the final thickness of each chip to be obtained from the wafer. Then the wafer backside is etched with a dry etch, for example, atmospheric pressure plasma etch. The wafer is thinned until the grooves are exposed from the backside. The dry etch leaves the chip's backside smooth. After the grooves have been exposed, the dry etch is continued to remove damage from the chip sidewalls and to round the chips' bottom edges and corners. The grooves' aspect ratio is large to reduce the lateral etch rate of the chip sidewalls and thus allow more area for on-chip circuitry.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.