Semiconductor configuration
US6498382B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2001 |
| Grant date | Dec 24, 2002 |
| Priority date | — |
| Expiry date | Mar 26, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention relates to a semiconductor configuration in which electrodes are insulated by a gas-filled or evacuated cavity. The semiconductor configuration includes at least two rigid electrodes; body regions; an active zone; a drift path; and an insulating device electrically isolating the at least two electrodes from each another. At least one of the at least two electrodes is a trench electrode electrically connected to the active zone. The insulating device includes a structure selected from the group consisting of at least one insulating or holding layer and a pn junction. The insulating device is further formed with at least one cavity. The trench electrode is isolated from the drift path by the cavity and surrounded by the cavity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.