Self-aligned silicide (salicide) process for strained silicon MOSFET ON SiGe and structure formed thereby
US6503833B1 · kind B1 · utility
40Cited by
5References
35Claims
0Family size
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Key dates
| Filing date | Nov 15, 2000 |
| Grant date | Jan 7, 2003 |
| Priority date | — |
| Expiry date | Dec 2, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/751
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor substrate (and resultant structure), includes providing a semiconductor substrate to be silicided including a source and drain formed therein on respective sides of a gate, depositing a metal film over the gate, source and drain regions, reacting the metal film with Si at a first predetermined temperature, to form a metal-silicon alloy, etching the unreacted metal, depositing a silicon film over the source drain and gate regions, annealing the substrate at a second predetermined temperature, to form a metal-Si2 alloy, and selectively etching the unreacted Si.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.