Patent · US Expired

Integrated memory with plate line segments

US6504747B2 · kind B2 · utility

3Cited by

8References

5Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Georg Braun · Hersbruck, DE
Heinz Honigschmid · Starnberg, DE

Key dates

Filing date	Feb 23, 2001
Grant date	Jan 7, 2003
Priority date	—
Expiry date	Jun 10, 2021

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/22
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The integrated memory has driver units DRVi, via which the column select lines CSLi are connected to the plate line segments PLi and which, as a function of the potential of the associated column select lines CSLi and the word addresses RADR on the plate line segments PLi connected to them, generate potentials which have defined values for each operating state of the memory.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.