Timer circuit with programmable decode circuitry
US6504891B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 14, 2000 |
| Grant date | Jan 7, 2003 |
| Priority date | — |
| Expiry date | Jun 14, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/822
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A timer circuit for providing output pulses of an adjustable duration based upon stored decode parameters. The circuit has a timer element which generates a periodic timing signal. Preferably the frequency of the periodic timing signal is also adjustable. A frequency divider is clocked by the timing signal and provides a plurality of frequency divided outputs. A decode circuit combines selected ones of the frequency divided outputs based upon decode parameters and generates a timer circuit output pulse having a duration determined by the frequency divided outputs selected by the decode parameters. The decode parameters are stored in a non-volatile data storage unit so that the timer output pulse will remain the same after power interruption.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.