Christophe J. Chevallier
339Patents
51h-index
101Co-inventors
93Inventor score
Filing activity: Feb 19, 1991 → Aug 22, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6753561B1 | Cross point memory array using multiple thin films | Physics | 260 | Expired |
| US5801985A | Memory system having programmable control parameters | Physics | 237 | Expired |
| US7719876B2 | Preservation circuit and methods to maintain values representing data in one or more layers of memory | Physics | 229 | Active |
| US7020006B2 | Discharge of conductive array lines in fast memory | Physics | 160 | Expired |
| US5875142A | Integrated circuit with temperature detector | Physics | 134 | Expired |
| US5581206A | Power level detection circuit | Electricity | 128 | Expired |
| US6879340B1 | CMOS imager with integrated non-volatile memory | Emerging Cross-Sectional Technologies | 122 | Expired |
| US6002627A | Integrated circuit with temperature detector | Physics | 118 | Expired |
| US6834008B2 | Cross point memory array using multiple modes of operation | Physics | 117 | Expired |
| US6073204A | Memory system having flexible architecture and method | Physics | 116 | Expired |
| US6836421B2 | Line drivers that fit within a specified line pitch | Physics | 114 | Expired |
| US7538338B2 | Memory using variable tunnel barrier widths | Physics | 111 | Expired |
| US6047352A | Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure | Physics | 109 | Expired |
| US7067862B2 | Conductive memory device with conductive oxide electrodes | Physics | 106 | Expired |
| US6970375B2 | Providing a reference voltage to a cross point memory array | Physics | 103 | Expired |
| US5818289A | Clocking scheme and charge transfer switch for increasing the efficiency of a charge pump or other circuit | Electricity | 100 | Expired |
| US5956289A | Clock signal from an adjustable oscillator for an integrated circuit | Physics | 98 | Expired |
| US6856536B2 | Non-volatile memory with a single transistor and resistive memory element | Physics | 96 | Expired |
| US6363454B1 | Memory system having flexible architecture and method | Physics | 95 | Expired |
| US6160755A | Clock signal from an adjustable oscillator for an integrated circuit | Physics | 95 | Expired |
| US6859382B2 | Memory array of a non-volatile ram | Electricity | 93 | Expired |
| US6504891B1 | Timer circuit with programmable decode circuitry | Electricity | 91 | Expired |
| US7372753B1 | Two-cycle sensing in a two-terminal memory array having leakage current | Physics | 91 | Active |
| US6278632A | Method and circuitry for performing analog over-program and under-program detection for a multistate memory cell | Physics | 87 | Expired |
| US7379364B2 | Sensing a signal in a two-terminal memory array having leakage current | Physics | 85 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.