Integrated circuit guard ring structures
US6509622B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 2000 |
| Grant date | Jan 21, 2003 |
| Priority date | — |
| Expiry date | Oct 10, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit including a die having a circuit area and a plurality of guard rings. The circuit area includes active devices, passive devices, and interconnects connected to form an integrated circuit. The plurality of guard rings includes a plurality of stacked guard rings having substantially equal widths and encircling the circuit area. Alternatively, the plurality of guard rings includes metallization level guard rings interleaved with one or more via level guard rings. Each of the one or more via level guard rings includes one or more guard rings encircling the circuit area. Alternatively, the plurality of guard rings includes a plurality of concentric guard rings encircling the circuit area. Each of the plurality of guard rings is fabricated from a metal, such as aluminum, copper, or silver, or an alloy of aluminum, copper, or silver.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.