System and method for tracing program execution within a superscalar processor
US6513134B1 · kind B1 · utility
14Cited by
11References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 15, 1999 |
| Grant date | Jan 28, 2003 |
| Priority date | — |
| Expiry date | Sep 15, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3636
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for tracing program code within a processor having an embedded cache memory. The non-invasive tracing technique minimizes the need for trace information to be broadcast externally. The tracing technique monitors changes in instruction flow from the normal execution stream of the code. Various features, individually and in combination, provide a real-time trace-forward and trace-back capability with a minimal number of pins running at a minimal frequency relative to the processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.