Full flow focus exposure matrix analysis and electrical testing for new product mask evaluation
US6513151B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 2001 |
| Grant date | Jan 28, 2003 |
| Priority date | — |
| Expiry date | Sep 7, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/70658
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method for new product mask evaluation is provided. Focus exposure matrices are printed at one or more layers (e.g., active gate) on full flow production wafers. The focus exposure matrices are then analyzed to produce data that facilitates detecting printed defects. The full flow production wafers are also subjected to end of line electrical testing to determine bit level errors. Print defects can be correlated with bit level errors to increase confidence in detected defects. The method includes a hierarchy of testing layers, each of which produce data that can be employed in detecting defects in a reticle and/or producing a yield analysis. The method involves scanning a reticle upon which the new product mask is etched and performing a printability simulation to determine what affect, if any, detected reticle defects will have on printing defects on a wafer. After the reticle is scanned, full flow production wafers printed from the pattern on the reticle can be scanned for defects, as can resist-on-silicon flat test wafers, where a higher signal to noise ratio facilitates detecting defects that may otherwise not be detected. The reticle scanning can include critical dimension m…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.