Method for improving uniformity and reducing etch rate variation of etching polysilicon
US6514378B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2000 |
| Grant date | Feb 4, 2003 |
| Priority date | — |
| Expiry date | Mar 31, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32137
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for consecutively processing a series of semiconductor substrates with minimal plasma etch rate variation following cleaning with fluorine-containing gas and/or seasoning of the plasma etch chamber. The method includes steps of (a) placing a semiconductor substrate on a substrate support in a plasma etching chamber, (b) maintaining a vacuum in the chamber, (c) etching an exposed surface of the substrate by supplying an etching gas to the chamber and energizing the etching gas to form a plasma in the chamber, (d) removing the substrate from the chamber; and (e) consecutively etching additional substrates in the chamber by repeating steps (a-d), the etching step being carried out by minimizing a recombination rate of H and Br on a silicon carbide edge ring surrounding the substrate at a rate sufficient to offset a rate at which Br is consumed across the substrate. The method can be carried out using pure HBr or combination of HBr with other gases.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.