Tom Choi
21Patents
6h-index
43Co-inventors
69Inventor score
Filing activity: Mar 31, 2000 → Oct 19, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9478433B1 | Cyclic spacer etching process with improved profile control | Electricity | 106 | Active |
| US10026621B2 | SiN spacer profile patterning | Electricity | 93 | Active |
| US6514378B1 | Method for improving uniformity and reducing etch rate variation of etching polysilicon | Electricity | 21 | Expired |
| US7782591B2 | Methods of and apparatus for reducing amounts of particles on a wafer during wafer de-chucking | Electricity | 6 | Active |
| US6531029B1 | Vacuum plasma processor apparatus and method | Electricity | 6 | Expired |
| US8906810B2 | Pulsed dielectric etch process for in-situ metal hard mask shape control to enable void-free metallization | Electricity | 6 | Active |
| US8283255B2 | In-situ photoresist strip during plasma etching of active hard mask | Electricity | 3 | Active |
| US10424487B2 | Atomic layer etching processes | Electricity | 3 | Active |
| US9818621B2 | Cyclic oxide spacer etch process | Electricity | 2 | Active |
| US9721807B2 | Cyclic spacer etching process with improved profile control | Electricity | 2 | Active |
| US10600639B2 | SiN spacer profile patterning | Electricity | 1 | Active |
| US10629473B2 | Footing removal for nitride spacer | Electricity | 1 | Active |
| US7479457B2 | Gas mixture for removing photoresist and post etch residue from low-k dielectric material and method of use thereof | Physics | 1 | Expired |
| US6897156B2 | Vacuum plasma processor method | Electricity | 1 | Expired |
| US10403507B2 | Shaped etch profile with oxidation | Electricity | 1 | Active |
| US10062575B2 | Poly directional etch by oxidation | Electricity | 1 | Active |
| US10354889B2 | Non-halogen etching of silicon-containing materials | Electricity | 0 | Active |
| US8912633B2 | In-situ photoresist strip during plasma etching of active hard mask | Electricity | 0 | Active |
| US10770269B2 | Apparatus and methods for reducing particles in semiconductor process chambers | Emerging Cross-Sectional Technologies | 0 | Active |
| US12374584B2 | Multi color stack for self aligned dual pattern formation for multi purpose device structures | Electricity | 0 | Active |
| US8124516B2 | Trilayer resist organic layer etch | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.