Method of manufacturing high voltage transistor with modified field implant mask
US6514830B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 11, 2002 |
| Grant date | Feb 4, 2003 |
| Priority date | — |
| Expiry date | Jan 11, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/43
Abstract
A method of manufacturing a high voltage transistor exhibiting high gated diode breakdown voltage, low leakage and low body effect while avoiding an excessive number of costly masking steps. A high gated diode breakdown voltage is provided in the manufacturing process by masking the high voltage junctions from the conventional field implant and masking the source/drain regions from the conventional threshold adjust implant. Angled openings are formed in the field implant blocking mask so that the field implant at varying distances away from the junctions, thus achieving low leakage and a high gated diode breakdown voltage. The field implant blocking mask is extended over the channel area, thereby producing a transistor with low body effect.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.