Method and circuit configuration for controlling a data driver

US6515514B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Henning Hartmann · Oberhaching, DE
• Dirk Hottgenroth · Hersbruck, DE

Key dates

• Filing date: Nov 30, 2001
• Grant date: Feb 4, 2003
• Expiry date: Nov 30, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03K19/01707
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

A data driver is activated in dependence of a provided bit sequence in order to produce, at the data output of the driver, a data signal which, in the times between periodic reference clock pulse edges, is in each case driven to a high or low validity level in accordance with the binary value of the bits of the provided bit sequence. Directly before selected reference clock pulse edges, a preparation interval of a fixed length is provided, during which the driver is prompted to drive its data output to a medium level between the high validity level and the low validity level. The length of the preparation interval is at least equal to the response time necessary to drive the data output over the level difference between one of the validity levels and the medium level, but is shorter than twice this response time.