Dual threshold SRAM cell for single-ended sensing
US6519176B1 · kind B1 · utility
30Cited by
5References
21Claims
0Family size
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Key dates
| Filing date | Sep 29, 2000 |
| Grant date | Feb 11, 2003 |
| Priority date | — |
| Expiry date | Apr 17, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/412
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A six transistor SRAM cell for single-ended sensing is described along with related memory architecture. The cell comprises a bistable circuit connected to complementary bit lines through a pair of passgate transistors. One of the passgate transistors has a lower threshold voltage than the other transistor. The lower threshold voltage is used to couple the cell to a single-ended sense amplifier through one of the bit lines. In one embodiment fewer than all the bit lines in an array are precharged in order to reduce power consumption in the array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.