SOI transistor with polysilicon seed

US6521949B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Fariborz Assaderaghi · Jefferson Valley, US
• Tze-Chiang Chen · Yorktown Heights, US
• K. Paul Muller · Wappingers Falls, US
• Edward J. Nowak · South Burlington, US
• Ghavam G. Shahidi · Pound Ridge, US

Key dates

• Filing date: May 3, 2001
• Grant date: Feb 18, 2003
• Expiry date: May 3, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/6745

Abstract

Short channel effects are effectively suppressed by steep impurity concentration gradients which can be placed with improved accuracy of location and geometry while relaxing process tolerances by implanting impurities in a polysilicon seed adjacent a conduction channel of a transistor and diffusing impurities therefrom into the conduction channel. The polysilicon seed also allows the epitaxial growth of polysilicon source/drain contacts therefrom having a configuration which minimizes current density and path length therein while providing further mechanical advantages.