Nickel silicide process using starved silicon diffusion barrier
US6525391B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 6, 2001 |
| Grant date | Feb 25, 2003 |
| Priority date | — |
| Expiry date | Mar 4, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/90
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A MOSFET semiconductor device includes a substrate, a gate electrode, a gate oxide, first and second sets sidewall spacers, and nickel silicide layers. The gate oxide is disposed between the gate electrode and the substrate, and the substrate includes source/drain regions. The gate electrode has first and second opposing sidewalls, and the first set of sidewall spacers are formed from a silicon starved spacer materials, examples of which include SiOX, wherein X>2, SiNX, wherein X>1, or SiOXNY, wherein X+Y>2. The second set of sidewall spacers are formed from silicon nitride and are respectively disposed adjacent the first set of sidewall spacers. The nickel silicide layers are disposed on the source/drain regions and the gate electrode. The first set of sidewall spacers act as a silicon diffusion barrier for preventing silicon from migrating from the gate electrode to the second set of sidewall spacers. A method of manufacturing the semiconductor device is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.