Inventor · Fremont, CA, US

Minh Van Ngo

301Patents
32h-index
188Co-inventors
93Inventor score

Filing activity: Nov 16, 1995 → Jul 11, 2022

Most-cited inventions

PatentTitleAreaCited byStatus
US6573172B1 Methods for improving carrier mobility of PMOS and NMOS devices Electricity 177 Expired
US6787864B2 Mosfets incorporating nickel germanosilicided gate and methods for their formation Electricity 98 Expired
US6746971B1 Method of forming copper sulfide for memory cell Electricity 89 Expired
US6645882B1 Preparation of composite high-K/standard-K dielectrics for semiconductor devices Electricity 82 Expired
US6033584A Process for reducing copper oxide during integrated circuit fabrication Electricity 71 Expired
US6670241B1 Semiconductor memory with deuterated materials Electricity 66 Expired
US6830998B1 Gate dielectric quality for replacement metal gate transistors Electricity 62 Expired
US6174743A Method of reducing incidence of stress-induced voiding in semiconductor interconnect lines Electricity 58 Expired
US6706576B1 Laser thermal annealing of silicon nitride for increased density and etch selectivity Electricity 58 Expired
US6143672A Method of reducing metal voidings in 0.25 .mu.m AL interconnect Electricity 57 Expired
US6563183B1 Gate array with multiple dielectric properties and method for forming same Electricity 57 Expired
US6528884B1 Conformal atomic liner layer in an integrated circuit interconnect Electricity 51 Expired
US6656763B1 Spin on polymers for organic memory devices Emerging Cross-Sectional Technologies 50 Expired
US6303505A Copper interconnect with improved electromigration resistance Electricity 47 Expired
US6525391B1 Nickel silicide process using starved silicon diffusion barrier Emerging Cross-Sectional Technologies 46 Expired
US6809402B1 Reflowable-doped HDP film Electricity 46 Expired
US6451647B1 Integrated plasma etch of gate and gate dielectric and low power plasma post gate etch removal of high-K residual Electricity 45 Expired
US6436808B1 NH3/N2-plasma treatment to prevent organic ILD degradation Electricity 45 Expired
US6770905B1 Implantation for the formation of CuX layer in an organic memory device Electricity 41 Expired
US6190966A Process for fabricating semiconductor memory device with high data retention including silicon nitride etch stop layer formed at high temperature with low hydrogen ion concentration Emerging Cross-Sectional Technologies 41 Expired
US6773954B1 Methods of forming passive layers in organic memory cells Electricity 41 Expired
US6764898B1 Implantation into high-K dielectric material after gate etch to facilitate removal Electricity 40 Expired
US6214731A Copper metalization with improved electromigration resistance Electricity 39 Expired
US6617215B1 Memory wordline hard mask Electricity 39 Expired
US6562718B1 Process for forming fully silicided gates Electricity 39 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.