Method for fabricating a trench MOS power transistor

US6528355B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Franz Hirler · Isen, DE
• Manfred Kotek · Villach, AT
• Joost Larik · Poing, DE

Key dates

• Filing date: Jan 28, 2002
• Grant date: Mar 4, 2003
• Expiry date: Jan 28, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/681

Abstract

A method for fabricating a trench MOS transistor includes the step of at least partly filling the trench with a conductive material which is isolated from the inner surface of the trench by an insulating layer. The insulating layer has a layer thickness that is larger in the region of the lower end of the trench than at the upper end of the trench.