Cluster tool for fabricating semiconductor device
US6530993B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 2001 |
| Grant date | Mar 11, 2003 |
| Priority date | — |
| Expiry date | Apr 3, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S414/135
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A cluster tool for fabricating a semiconductor device includes: a transfer chamber having a wafer handling robot; a plurality of process chambers installed adjacent to each wall face of the transfer chamber; a loadlock chamber installed adjacent to different wall faces of the transfer chamber, in which a cassette is positioned to bring in and take out a wafer; and a cooling chamber installed at one side of a different wall face of the transfer chamber with an open-and-shut unit therebetween, the cooling chamber being provided with a wafer multiple-mounting unit having a plurality of wafer mounting plates for simultaneously mounting wafers which finishes undergoing processes in the process chamber and cooling them. Since it includes a fresh structure of wafer multiple-mounting unit, even though the plurality of process chambers of the cluster tool simultaneously proceed the fabrication process of a semiconductor device, the process bottle neck phenomenon as in the conventional art would not occur even though the wafer is delayed to be cooled. Consequently, the process time is shortened and thus the production cost of the semiconductor device can be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.