Patent · US Expired

Method for high aspect ratio gap fill using sequential HDP-CVD

US6531377B2 · kind B2 · utility

163Cited by

13References

23Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Andreas Knorr · Saratoga Springs, US
Mihel Seitz · Wappingers Falls, US

Key dates

Filing date	Jul 13, 2001
Grant date	Mar 11, 2003
Priority date	—
Expiry date	Jul 13, 2021

Classification

Technology area (CPC H)Electricity
CPC primaryH01L21/76229
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A method of providing isolation between element regions of a semiconductor memory device (200). Isolation trenches (211) are filled using several sequential anisotropic insulating material (216/226/230) HPD-CVD deposition processes, with each deposition process being followed by an isotropic etch back to remove the insulating material (216/226/230) from the isolation trench (211) sidewalls. A nitride liner (225) may be deposited after isolation trench (211) formation. A top portion of the nitride liner (225) may be removed prior to the deposition of the top insulating material (230) layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.