Integration of two memory types on the same integrated circuit
US6531731B2 · kind B2 · utility
27Cited by
10References
13Claims
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Key dates
| Filing date | Jun 15, 2001 |
| Grant date | Mar 11, 2003 |
| Priority date | — |
| Expiry date | Jun 15, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/981
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
Both a non-volatile memory (NVM) and a dynamic nanocrystal memory (DNM) are integrated on a semiconductor substrate. Control gates and control dielectrics with embedded nanocrystals or discrete storage elements are formed over differing thicknesses of tunnel dielectrics to form the two memories. Source and drain regions are formed within the semiconductor substrate adjacent to the tunnel dielectrics. Various methods can be used to form a thin tunnel oxide and a thick tunnel oxide by adding minimum processing steps.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.