Write data masking for higher speed DRAMs
US6532180B2 · kind B2 · utility
14Cited by
15References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 20, 2001 |
| Grant date | Mar 11, 2003 |
| Priority date | — |
| Expiry date | Jun 20, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4096
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for masking data written to a memory device that reduces the effective write cycle time of the memory device is disclosed. Firing of the column selects is pre-empted, thereby masking data to be written to a memory device. By pre-empting the column selects, the margin required for disabling a write driver can be eliminated, thereby reducing the effective write cycle. Additionally, data masking can be performed on a per-byte basis by associating independent column selects with each data byte on multi-byte wide devices, e.g., ×16 or ×32.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.