Method of forming metal layer(s) and/or antireflective coating layer(s) on an integrated circuit
US6534398B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 12, 2001 |
| Grant date | Mar 18, 2003 |
| Priority date | — |
| Expiry date | Aug 19, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0332
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming metallic layers on a substrate includes the steps of forming a first layer including a first metal on the substrate; cooling the first layer for a period of time sufficient to suppress formation of an intermetallic phase; and forming a second layer including a second metal distinct from the first metal on the first layer. The cooling step decreases the roughness of the resultant stacked structure by suppressing the formation of an intermetallic phase layer between the two metallic layers and by suppressing “bumps” or other surface irregularities that may form at relatively reactive grain boundaries in the first layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.