Sam Geha
26Patents
11h-index
26Co-inventors
75Inventor score
Filing activity: Sep 29, 1992 → Sep 15, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8093128B2 | Integration of non-volatile charge trap memory devices and logic CMOS devices | Electricity | 84 | Active |
| US6803318B1 | Method of forming self aligned contacts | Electricity | 57 | Expired |
| US6140228A | Low temperature metallization process | Electricity | 48 | Expired |
| US5977638A | Edge metal for interconnect layers | Electricity | 30 | Expired |
| US8643124B2 | Oxide-nitride-oxide stack having multiple oxynitride layers | Electricity | 25 | Active |
| US5339039A | Langmuir probe system for radio frequency excited plasma processing system | Electricity | 23 | Expired |
| US9449831B2 | Oxide-nitride-oxide stack having multiple oxynitride layers | Electricity | 22 | Active |
| US9355849B1 | Oxide-nitride-oxide stack having multiple oxynitride layers | Electricity | 21 | Active |
| US9349824B2 | Oxide-nitride-oxide stack having multiple oxynitride layers | Electricity | 20 | Active |
| US7205164B1 | Methods for fabricating magnetic cell junctions and a structure resulting and/or used for such methods | Electricity | 14 | Expired |
| US6756302B1 | Low temperature metallization process | Electricity | 11 | Expired |
| US5968851A | Controlled isotropic etch process and method of forming an opening in a dielectric layer | Emerging Cross-Sectional Technologies | 8 | Expired |
| US6187667A | Method of forming metal layer(s) and/or antireflective coating layer(s) on an integrated circuit | Electricity | 7 | Expired |
| US6693042B1 | Method for etching a dielectric layer formed upon a barrier layer | Electricity | 5 | Expired |
| US6156645A | Method of forming a metal layer on a substrate, including formation of wetting layer at a high temperature | Electricity | 5 | Expired |
| US6627547B2 | Hot metallization process | Electricity | 4 | Expired |
| US6309971A | Hot metallization process | Electricity | 3 | Expired |
| US6756315B1 | Method of forming contact openings | Electricity | 3 | Expired |
| US10374067B2 | Oxide-nitride-oxide stack having multiple oxynitride layers | Electricity | 3 | Active |
| US6534398B2 | Method of forming metal layer(s) and/or antireflective coating layer(s) on an integrated circuit | Electricity | 1 | Expired |
| US10896973B2 | Oxide-nitride-oxide stack having multiple oxynitride layers | Electricity | 1 | Active |
| US12266521B2 | Oxide-nitride-oxide stack having multiple oxynitride layers | Electricity | 0 | Active |
| US10903342B2 | Oxide-nitride-oxide stack having multiple oxynitride layers | Electricity | 0 | Active |
| US11784243B2 | Oxide-nitride-oxide stack having multiple oxynitride layers | Electricity | 0 | Active |
| US10903068B2 | Oxide-nitride-oxide stack having multiple oxynitride layers | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.