Integrated semiconductor circuit with an increased operating voltage
US6535046B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 2, 2002 |
| Grant date | Mar 18, 2003 |
| Priority date | — |
| Expiry date | Jul 2, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/83
Abstract
An integrated semiconductor circuit has a transistor of the NMOS type that is disposed in a well of a p conductivity type in a substrate of the p conductivity type. The well is electrically insulated from the substrate. The semiconductor circuit furthermore contains a control circuit with a variable output signal. The well terminal of the transistor is connected to the output signal of the control circuit. The transistor is protected against permanent damage by virtue of its well potential being raised in a corresponding operating mode of the semiconductor circuit in which an increased operating voltage is applied to the transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.