Drain bias for non-volatile memory
US6535423B2 · kind B2 · utility
70Cited by
27References
35Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2000 |
| Grant date | Mar 18, 2003 |
| Priority date | — |
| Expiry date | Dec 29, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method are disclosed for providing drain bias for non-volatile memory. According to one embodiment, the drain bias is provided utilizing a drain bias circuit that is referenced by a static voltage reference.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.