Robert Baltar
14Patents
7h-index
12Co-inventors
63Inventor score
Filing activity: Sep 30, 1994 → Jun 29, 2015
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6535423B2 | Drain bias for non-volatile memory | Physics | 70 | Expired |
| US5663923A | Nonvolatile memory blocking architecture | Physics | 42 | Expired |
| US6209069A | Method and apparatus using volatile lock architecture for individual block locking on flash memory | Physics | 25 | Expired |
| US6446179B2 | Computing system with volatile lock architecture for individual block locking on flash memory | Physics | 19 | Expired |
| US6434049B1 | Sample and hold voltage reference source | Physics | 14 | Expired |
| US6212099A | Preventing data corruption in a memory device using a modified memory cell conditioning methodology | Physics | 8 | Expired |
| US5517138A | Dual row selection using multiplexed tri-level decoder | Physics | 8 | Expired |
| US6456540B1 | Method and apparatus for gating a global column select line with address transition detection | Physics | 5 | Expired |
| US6442069B1 | Differential signal path for high speed data transmission in flash memory | Physics | 4 | Expired |
| US9104547B2 | Wear leveling for a memory device | Physics | 4 | Active |
| US9710376B2 | Wear leveling for a memory device | Physics | 2 | Active |
| US6744671B2 | Kicker for non-volatile memory drain bias | Physics | 2 | Expired |
| US6570789B2 | Load for non-volatile memory drain bias | Physics | 1 | Expired |
| US6574141B2 | Differential redundancy multiplexor for flash memory devices | Physics | 1 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.