Process for fabricating a non-volatile memory device
US6537881B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 16, 2000 |
| Grant date | Mar 25, 2003 |
| Priority date | — |
| Expiry date | Oct 16, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/037
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for fabricating a non-volatile memory device in which extraneous electrical charge is removed from charge-storage layers during fabrication includes exposing a charge-storage layer to infrared radiation prior to forming additional layers of the non-volatile memory cell. For example, in a memory cell incorporating a dielectric floating-gate electrode, such as silicon nitride, the infrared radiation exposure step is carried out after forming the floating-gate electrodes and prior to formation of the control-gate electrode. By exposing the charge-storage layer to infrared radiation prior to forming additional layers, extraneous electrical charge arising from previous processing steps can be efficiently removed from the floating-gate electrodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.