Electron emission apparatus
US6545407B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | May 11, 2000 |
| Grant date | Apr 8, 2003 |
| Priority date | — |
| Expiry date | May 11, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J31/127
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A field emission device having a gate electrode structure in which a nanocrystalline or microcrystalline silicon layer is positioned over a silicon dioxide dielectric layer. Also disclosed are methods for forming the field emission device. The nanocrystalline or microcrystalline silicon layer forms a bond with the dielectric layer that is sufficiently strong to prevent delamination during a chemical-mechanical planarization operation that is conducted during formation of the field emission device. The nanocrystalline or microcrystalline silicon layer is deposited by PECVD in an atmosphere that contains silane and hydrogen at a ratio in a range from about 1:15 to about 1:40. Multiple field emission devices may be formed and included in a flat panel display for computer monitors, telecommunications devices, and the like.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.