DMOS transistor structure having improved performance
US6548860B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 29, 2000 |
| Grant date | Apr 15, 2003 |
| Priority date | — |
| Expiry date | Feb 29, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/393
Abstract
A trench DMOS transistor structure is provided that includes at least three individual trench DMOS transistor cells formed on a substrate of a first conductivity type. The plurality of individual DMOS transistor cells is dividable into peripheral transistor cells and interior transistor cells. Each of the individual transistor cells includes a body region located on the substrate, which has a second conductivity type. At least one trench extends through the body region and the substrate. An insulating layer lines the trench. A conductive electrode is located in the trench, which overlies the insulating layer. Interior transistor cells, but not the peripheral transistor cells, each further include a source region of the first conductivity type in the body region adjacent to the trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.