Atomic layer deposition of capacitor dielectric
US6551893B1 · kind B1 · utility
135Cited by
7References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 27, 2001 |
| Grant date | Apr 22, 2003 |
| Priority date | — |
| Expiry date | Nov 27, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/716
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A capacitor structure is formed over a semiconductor substrate by atomic layer deposition to achieve uniform thickness in memory cell dielectric layers, particularly where the dielectric layer is formed in a container-type capacitor structure. In accordance with several embodiments of the present invention, a process for forming a capacitor structure over a semiconductor substrate is provided. Other embodiments of the present invention relate to processes for forming memory cell capacitor structures, memory cells, and memory cell arrays. Capacitor structures, memory cells, and memory cell arrays are also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.