Patent · US Expired

Method of reading electrical fuses/antifuses

US6552549B1 · kind B1 · utility

6Cited by
4References
4Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 29, 2001
Grant dateApr 22, 2003
Priority date
Expiry dateMay 29, 2021

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C17/18
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Electrical fuses/antifuses in a semiconductor memory configuration, such as in particular a DRAM, are read, instead of with the previously conventional internal voltage, with the voltage that defines the high potential of the bit lines of a memory cell array in the semiconductor memory. The high potential of the bit lines is defined by a voltage that is reduced relative to the internal voltage of the semiconductor memory.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.