Current saving mode for input buffers
US6552596B2 · kind B2 · utility
32Cited by
11References
74Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 10, 2001 |
| Grant date | Apr 22, 2003 |
| Priority date | — |
| Expiry date | Aug 10, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/007
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An input buffer receives an external input signal during an active mode and a low-power mode. The input buffer includes a switching system to switch the input buffer between multiple conductive paths such that current consumed by the input buffer during the low-power mode is substantially less than current consumed by the buffer during the active mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.