Patent · US Expired

Circuit configuration and method for synchronization

US6556486B2 · kind B2 · utility

3Cited by

5References

17Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Herbert Benzinger · Birkenfeld, DE
Norbert Wirth · Unterschleißheim, DE
Ralf Schneider · Birkenfeld, DE

Key dates

Filing date	Nov 30, 2001
Grant date	Apr 29, 2003
Priority date	—
Expiry date	Nov 30, 2021

Classification

Technology area (CPC G)Physics
CPC primaryG11C7/22
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A circuit configuration and a method for the synchronization of signals include transmitting signals in parallel through data lines and buffer-storing the signals in a synchronizing unit. A clock signal is determined from the signals of a data line and is used for synchronizing the outputting of the signals. The signals are output in the order in which the signals were read. The signals are likewise output through a plurality of data lines, the signals being output temporally synchronously. Propagation time differences are compensated due to the buffer-storage. Moreover, the clock signal is determined from the signals themselves. Consequently, the use of an additional clock signal is not necessary.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.