Programmable dual drive strength output buffer with a shared boot circuit
US6559690B2 · kind B2 · utility
8Cited by
38References
35Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 15, 2001 |
| Grant date | May 6, 2003 |
| Priority date | — |
| Expiry date | Mar 15, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/085
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device is discussed that includes an data output driver having two modes of operation for driving a data bus. The output driver includes a circuits to produce a full drive output high signal, a partial drive output high signal, a full drive output low signal and a partial drive output low signal. The output driver is protected against negative voltages on the data bus. The output driver is selectable and adaptable to drive terminated loads and unterminated loads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.