Memory configuration with a central connection area

US6560134B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Martin Brox · Munich, DE
• Karl-Peter Pfefferl · Hohenkirchen, DE
• Helmut Schneider · Hersbruck, DE
• Robert Kaiser · Kaufering, DE
• Dominique Savignac · Ismaning, DE

Key dates

• Filing date: Nov 7, 2001
• Grant date: May 6, 2003
• Expiry date: Nov 7, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/01082
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A memory configuration includes a central connection area. The central connection area is surrounded annularly by cell arrays having memory cells. The memory configuration has compact external dimensions and is suitable, in particular, for a side ratio of 2:1. All the peripheral circuits are preferably disposed in the central connection area. As a result, the propagation time differences between the peripheral circuits and the various cell arrays are relatively small.