Qualification test method and circuit for a non-volatile memory
US6563752B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 30, 2001 |
| Grant date | May 13, 2003 |
| Priority date | — |
| Expiry date | Aug 30, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A qualification test method for a non-volatile memory includes determining a relation curve between the programming voltage and the lifetime of the memory cell. A programming voltage with respect to the memory array within the expected lifetime is estimated. According to the relation curve, the accelerating test voltage and the test time period corresponding to the programming voltage operated in the expected lifetime are computed out. The test is performed for the test time period under the accelerating test voltage. All the memory cells at the programmed state are tested to see if the original programmed state still remains. If the programmed state remains, the memory array is judged to have the life period. If the programmed state does not remain, the memory array is judged to have no the life period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.