Semiconductor package
US6570249B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2002 |
| Grant date | May 27, 2003 |
| Priority date | — |
| Expiry date | Jan 30, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device and a fabrication method of the same are proposed, in which at least one electronic component is firstly mounted on a first substrate, and then the first substrate is attached onto a semiconductor chip or a second substrate. Further, with the chip being deposited on the second substrate, electrical connection is established among the first substrate, the second substrate and the chip. This combined structure is subsequently subjected to molding, ball implantation and singulation processes, and thus completes the fabrication of the semiconductor device. Such a semiconductor device provides significant advantages, including prevention of the occurrence of wire short-circuiting, no need to alter the substrate design, no need to use a circuit pattern with fine pitches or an expensive substrate integrated with electronic components.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.